Forum Discussion
5 Replies
- JohnT_Altera
Regular Contributor
Hi, Could you provide me more information how you performed the 2nd update? Are you only performed CvP update on the core image only? - jmelv
New Contributor
Yes, on the core image. The same software function is called each time. This is a PCIe x4 Gen 2 board using a flash device to configure the periphery at power up then loading a .rbf file for initialization and update. The first and second load of the core always works, the third always fails. The flash and the rbf file are not compressed or encrypted.
Thanks.
- JohnT_Altera
Regular Contributor
Hi, May I know if you are using Gen 2 when performing CvP update? The reason is that Cyclone V does not support CvP update using PCIe Gen 2. Could you try to lower down it to PCIe Gen1 when performing CvP? You may refer to https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base/solutions/fb125216_cv.html. - jmelv
New Contributor
Hi John,
I am not using CVP update mode, I am using CVP Initialization mode and doing a core image update. The CVP initialization works, so does the first core update. I know the link is set to Gen2 on the first core update since I can operate the board at the Gen2 rate before and after I do the update. It's the second core update that fails but nothing leading up to that update is different than the first one. The documentation says I should be able to update the core image without having to reboot.
Thanks
- JohnT_Altera
Regular Contributor
Hi, If you are using CVP Initialization only then you will not be able to performed second core update. In order to performed subsequent core update then you will need to enable the CVP Update features. Without this then you will not be able to performed subsequent CORE update. Please be aware that subsequent core update will not support Gen 2.