Forum Discussion
Altera_Forum
Honored Contributor
13 years agoYes, you can only run the testbench in modelsim. Textio is not appropriate for synthesys, hence why you cannot compile in Quartus.
The error you are getting is a type missmatch, you probably need to convert them using the to_signed(int, size) function. If you are unfamiliar with this, and textio, I suggest you read some VHDL tutorials, as these are very basic parts of VHDL.