Try to run *-HardwareLib-FPGA-* example in DS-5 debugger, LEDs will be blinking, observe to write/read operations and it adresses, and in parallel view GHRD sources in QSys.
You will be create (or get standard) and add in design component like gpio for LEDs with Avalon-MM interface, set offset to it properties or use auto-QSys mapping, and after compiling HPS may read/write registers on these offsets.
FPGA may access to HPS DDR through AMBA-bridge, our designers write tests for count speed of read/write operations, it be slightly little in comparison with FPGA-DDR.