HPS and FPGA fabric communication for Agilex 7 devices

I'm very sure a tutorial for this exists but I haven't been able to find one.

I am looking for a design example or tutorial that sends some data from HPS, computes(let's say simple vector addition in this case) and sends data back to HPS.

We may need to create Quartus design that consists of 1)AXI interconnect and 2)vector addition compute kernel. We then have to generate the bitstream and program the FPGA device. Finally, the main.cpp that runs on HPS should dumps some data to certain address so that FPGA compute kernel can receive, compute and send the results back.

What is the closest design tutorial for this simple HPS-FPGA fabric communication? The target device is Agilex 7 device. I do not intend to use oneAPI. I want to generate bitstream and compile the host code(that runs on HPS) separately.