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Altera_Forum's avatar
Altera_Forum
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10 years ago

How to use the "Debounce Operation" for a Cyclone V.

I would like to use the "Debounce Operation" for a Cyclone V GX, 5CGXFC5C6F27C7N, on a Terasic "Cyclone V GX Starter Kit." The starter kit uses a Schmitt-Trigger buffer on the board to reduce bounce ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Looking back over your question, I realize my answer above doesn't apply to you. The "Functional Description of the GPIO Interface" section of the Cyclone V handbook you refer to describes the GPIO interface of the HPS side of the SoC chip. You aren't using an SoC so that doesn't apply. There is no built in debounce on the normal FPGA pins.

This link https://www.eewiki.net/display/logic/debounce+logic+circuit+(with+verilog+example) might work for you but its fairly large. There are numerous other examples of how to do debounce on the net as well.