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Altera_Forum
Honored Contributor
16 years agoHow to use Shared pll in LVDS transmiter and resceiver functions
Hi,
I am trying to use the shared pll function for LVDS transmiter and resceiver. AN479 says transmiter and resceiver must use the same input clock frequency. does it mean the tx_inclock of transmiter and rx_inclock of resceiver? cannot believe.:confused:12 Replies
- Altera_Forum
Honored Contributor
In my design,
for LVDS Transmiter, the tx_inclock is 40MHz, deserialization factor is 20, so tx_outclock is 800M . for LVDS Receiver, it will receive signal from the LVDS Transmiter.thus,rx_inclock should be 800M, deserialization factor is 20, rx_outclock is 40MHz. So, the tx_inclock and rx_inclock are different in my design, how can i use the shared PLL function to reduce the resource usage. Thanks! - Altera_Forum
Honored Contributor
--- Quote Start --- does it mean the tx_inclock of transmiter and rx_inclock of resceiver? cannot believe. --- Quote End --- What's your particular problem in understanding this simple statement? xx_inclock is the the respective PLL input clock (also called reference clock). If receiver and transmitter are sharing a single PLL, there can be only one reference clock. It actually depends on your clock distribution scheme, if you can use a shared PLL. In some designs, it's possible.