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Honored Contributor
Honored ContributorHow to use Shared pll in LVDS transmiter and resceiver functions
Hi, I am trying to use the shared pll function for LVDS transmiter and resceiver. AN479 says transmiter and resceiver must use the same input clock frequency. does it mean the tx_inclock of tran...
Altera_ForumHonored Contributor
Honored ContributorThe Transmiter settings:
1.number of channes:3 2.deserialization factor:20 3.output data rate:800Mbps 4.clock frequency:100MHz 5.use shared pll(s) for Rx and Tx The Receiver settings: 1.number of channels:1 2.deserialization factor:20 3.input data rate:800Mbps 4.clock frequency:100MHz 5.use shared pll(s) for Rx and Tx I connected the rx_inclock and tx_inclock to a single clock source, but there needs 2 plls, seems that no merge action done.
