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Altera_Forum's avatar
Altera_Forum
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15 years ago

How to use ddr2 sram high performance controller

Hi,I want to use ddr2 sdram in sopc. But I meet trouble. This is my project picture. Dose anyone have a example?if so,please give me a example,thanks.
Altera_Forum's avatar
Altera_Forum
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15 years ago

I think I have a hunch what is happening here but it'll be really tricky to explain. I think you are seeing a side effect of native addressing since the SDRAM in your system 64 bits wide.

How wide is the memory interface (between the FPGA and SDRAM), what is the local burst length, and are you using the SDRAM in half or full rate? I'm thinking a 32-bit pipeline bridge between the CPU and SDRAM controller will fix this but I'm not 100% certain of that.