how to set timing constraint for jtag port

See this post:

https://community.intel.com/t5/Intel-Quartus-Prime-Software/altera-reserved-tck-in-timing-analysis-failure/m-p/1443221#M76635

May I know does my latest reply helps?

Best Regards,

Richard Tan

Thank you for acknowledge the solution provided.

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Thank you.

Best Regards,

Richard Tan

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