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ming001
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6 months ago

How to set clock controller in BTS (board_test_system) for 32G (NRZ) MXP BTS example

Dear support: We expect the Agilex 7 FPGA I-Series F-Tile. All four channels can run at 32G NRZ and 58G PMA4. Currently, we use the factory default setting, and MXPM can run at 25.78118G without er...
Programmable Logic Device
ming001's avatar
ming001
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6 months ago

Hi Ash_R:

Thanks for your support, it has been helpful.

We are unable to change the frequency to 32G configured in the F-tile using clock utilities.

as the system is rejecting our updated values.

Please refer the attached file.

I have a few questions as follows.

The default clock setting, it can run at 25.78118G Hz.

What reference clock values would allow the SerDes run at 32GHz?

Could you provide any refer documents for different data rate applications ?

Are there any constrains or limitations on setting the clock values?

Thanks again for your assistance.

Regards,

Ming