How to measure distance between two data

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rd_addr : in integer range 0 to 255;

kaz,why rd_addr is input ,why isn't output such as rd_data

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we are talking here about RAM (not CAM) so any address is always input. Data can be either input(wr_data) or output(rd_data).

vout(valid out) is a signal I added to flag that output is ready.

so far you have been developing this design but without clear spec as what are your given inputs and what is your output format.

I assume it is practice but you really should start from clear spec.

i can't use it In that case, the easiest way is to calculate one distance value for every clock edge

how can i do that??

hi kaz,

i want to thank y very match the design is run correct now the problem was in the simulator program,but now it run perfact . thanks again,you are my vhdl teacher

if i want to sum the distance values.i should make distance in a signal then summation those values

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hi kaz,

i want to thank y very match the design is run correct now the problem was in the simulator program,but now it run perfact . thanks again,you are my vhdl teacher

if i want to sum the distance values.i should make distance in a signal then summation those values

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Another satisfied customer. Thanks for the feedback. Though I am not used to the concept of distance between two data but I believe you mean it since address is normally given to places. I am still unclear about what/how you are given your inputs.

when the user write on the keyboard there is a software program capture the data input and measure the trigraphs duration (time) then i will make a sorter to sort those trigraphs duration according thair times ,so i need their time for ordering them only, but trust me i don't know how i give the trigraphs to the fpga . i know the procedures but can't make it reall in fpga board. should you suggest me away to make it??

another guestion my teacher . if i want to sum the distance values and the input may be 100 or 200 or any array i.e not certain number of input .how i can make it

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when the user write on the keyboard there is a software program capture the data input and measure the trigraphs duration (time) then i will make a sorter to sort those trigraphs duration according thair times ,so i need their time for ordering them only, but trust me i don't know how i give the trigraphs to the fpga . i know the procedures but can't make it reall in fpga board. should you suggest me away to make it??

another guestion my teacher . if i want to sum the distance values and the input may be 100 or 200 or any array i.e not certain number of input .how i can make it

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interfacing with PC is done commonly through nios. If you want a short cut then use realtime editable rams and update them with your new file. for that you need to instantiate rams and activate the realtime edit feature.

for adding values of distance use accumulator(just feedback register). for each sum first clear it then sum up in the feedback loop till some 2^n samples so that at the end you truncate n LSBs and clear it for next update.

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interfacing with PC is done commonly through nios. If you want a short cut then use realtime editable rams and update them with your new file. for that you need to instantiate rams and activate the realtime edit feature.

for adding values of distance use accumulator(just feedback register). for each sum first clear it then sum up in the feedback loop till some 2^n samples so that at the end you truncate n LSBs and clear it for next update.

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my above note on truncation of n bits applies if you want the average. If you just want sum then read accumulator value at the end.

yes y are right ,first i want to count the number of input samples,so i need a counter then when samples terminated and distances calculated i use the accumulator ,for example

if distances are 1+3+6+3=7 and the number of samples be 4

should i use another entity to make this ?

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yes y are right ,first i want to count the number of input samples,so i need a counter then when samples terminated and distances calculated i use the accumulator ,for example

if distances are 1+3+6+3=7 and the number of samples be 4

should i use another entity to make this ?

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well just a clocked process will do.

process(clk)
begin
if rising_edge(clk) then
   if clear = '1' then
       sum <= accum;
       accum <= (others => '0');
   else
       accum <= accum +distance;
   end if;
end if;
end process;

assuming distance is an incoming stream of samples, one per clock period. you control the clear signal using a counter for your samples.