How to measure distance between two data

you can create onchip(or external)RAM.

and you can create ram -initializ like following (this is verilog-HDL sorry)

////////////////////////////////////////////////////////////////////////////////////////////////

reg [WORD_WIDTH-1:0]pattern_rom[0:2**ADDR_WIDTH];

initial $readmemh( "ROM_HEX_FILE.txt",pattern_rom);

reg [WORD_WIDTH-1:0]outbuff;

always @ ( posedge csi_clk )

begin

outbuff <= pattern_rom[reg_read_addr];

end

assign wir_read_data = outbuff;

////////////////////////////////////////////////////////////////////////////////////////////////

ROM_HEX_FILE.txt is initial data of pattern_rom.

anyway, there is a way you can create table.

but I am not sure you really have big enough memory on your FPGA.