Occasional ContributorAs mentioned in A10 EMIF UG, looking for information on the following statement:
"Contact Intel FPGA Technical Services for information on how to manually trigger or inhibit periodic OCT updates for applications that are sensitive to latency."
Please share the solution so I can enable my customer. Thank you,
ContributorHi
You can change the periodic OCT option in the EMIF IP GUI parameter.
Occasional ContributorHi, the GUI only lets permanently enable or disable Periodic OCT Calibration. What we need is the ability to selectively block it during critical data transfers and then re-enable it the rest of the time to compensate for temperature cycling, etc ...
According to 3.4.3: https://www.intel.com/content/www/us/en/programmable/documentation/eqw1503946000045.html#mhi1460567996227 there is a way to do this, but requires your support. My local Intel resource indicated some lower level code may need changing to expose the appropriate controls.
Thank you,
ContributorHi
There is file to control the periodic OCT update and you can tweak the oct_recal_req signal in the file to enable or disable the periodic OCT.
ip/ed_synth/ed_synth_emif_0/altera_emif_arch_nf_191/synth/altera_emif_arch_nf_oct.sv
New ContributorHi
Are you sure it's oct_recal_req and not oct_cal_req?
Maybe I'm wrong but oct_recal_req output goes to c2t_afi[6] in altera_emif_arch_nf_seq_if.sv and that's it. No other action is done. On the other hand, the oct state machine triggers with oct_cal_req.
Thank you
ContributorI was bit inaccurate. not oct_cal_req ,but r_oct_cal_req signal in the RTL to disable it. oct_cal_req is the signal used during the power up.
Here is the example RTL change to disable periodic OCT update.
always_ff @(posedge w_oct_clock)
begin
if (w_oct_reset == 1'b1)
begin
r_oct_recal_timer[(OCT_RECAL_TIMER_WIDTH-1)] <= 1'b0;
r_oct_recal_timer[(OCT_RECAL_TIMER_WIDTH-2):0] <= OCT_RECAL_TIMER_PRESET[(OCT_RECAL_TIMER_WIDTH-2):0];
r_oct_recal_req <= 1'b0;
end
else if (user_oct_disalbe) // added, user interface signal.
r_oct_recal_req <= 1'b0; // added, disable periodic OCT
else
begin
if (r_oct_recal_timer[(OCT_RECAL_TIMER_WIDTH-1)] == 1'b1)
begin
r_oct_recal_timer[(OCT_RECAL_TIMER_WIDTH-1)] <= 1'b0;
r_oct_recal_timer[(OCT_RECAL_TIMER_WIDTH-2):0] <= OCT_RECAL_TIMER_PRESET[(OCT_RECAL_TIMER_WIDTH-2):0];
r_oct_recal_req <= ~r_oct_recal_req;
end
else
begin
r_oct_recal_timer[(OCT_RECAL_TIMER_WIDTH-1):0] <= r_oct_recal_timer[(OCT_RECAL_TIMER_WIDTH-1):0]
- {{(OCT_RECAL_TIMER_WIDTH-1){1'b0}}, 1'b1};
end
end
end
