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idemosaic's avatar
idemosaic
Icon for New Contributor rankNew Contributor
3 years ago

How to implement <line buffer> in the avalon-stream to connect other VIP cores?

目前，我们想添加自己的IP核来对接官方的VIP核。 然后自己的算法需要缓存3行，有没有这方面的参考代码或建议呢？希望不吝赐教！
ZH_Intel's avatar
ZH_Intel
Icon for Frequent Contributor rankFrequent Contributor
3 years ago

Hi idemosaic,

Thank you for your patience.

The VIP handles the video with frame unit, no line buffer.

You may need to identify the link number by counting the sync signal.

At the moment, there are no reference code available for this.

However, you may refer to the Intel FPGA Design Store for some VIP reference design that might help.

Intel FPGA Design Store

Thank you.

Best Regards,

ZulsyafiqH_Intel