seamusbleu
New Contributor
New ContributorHow to handle Stratix10 HPS-to-FPGA bridge ID width mismatch
The h2f_axi_master in the s10_hps has ID widths (AWID/ARID/RID/BID) of 4. I connect it to my custom IP which also has an ID width of 4 but platform designer complains that the ID width must be 5. I...
So what you're saying is that there is no solution to this problem - that is not helpful.
