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Altera_Forum
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15 years ago

How to fix Quartus II Error 10031 and 10032

hi all,, i have 2 problem with my verilog hdl coding. when i ran in quartus ii, it show:- 1. Error (10031): Net "sig_speed[15]" at pro_dec6.v(13) is already driven by input port "initial_speed...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Well it is what it says.

You are giving sig_speed[15] values from 2 different ports/signals.

Somewhere in your code you have (this is VHDL code):

something like this: sig_speed[15] <= example[15];

And somewhere else (maybe in a parallel proces) you have sig_speed[15]<=initial_speed[15];

Also your code isn't attached.