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eran_el's avatar
eran_el
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3 years ago

How to fit 2 multipliers in one DSP block - Arria V?

In a project done using Arria V FPGA (5AGXFB1HF35I3), I'm using an IP (LPM_MULT) with the following properties: dataa and datab input width - 16bit result output width - 32bit Signed Two cl...
eran_el's avatar
eran_el
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3 years ago

Hi,

Sorry for not replying.

Unfortunately I am unable to share the project since it is work related and I am not allowed to do that.

Are there some requirements for merging multipliers into DSP blocks? Perhaps I am missing something.