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I think you want the datasheet report.
http://quartushelp.altera.com/15.0/mergedprojects/analyze/sta/sta_com_report_datasheet.htm --- Quote End ---
Hi, rbugalho! I tried your suggestion. I started "Report Datasheet" task and looked into "Clock to Output Times" part of output report. As I understand, "Clock to Output Time" means total delay from input clock pin transition to resulted output pin transition, in my case through the last register in the path (the register which feeds output pin directly). I compared that delay to a sum of clock and data delay from report_timing and they are equal!
Well, it is not exactly what I needed because my task was to find out total amount of delay from input pin to output pin in system like in example I added in the beginning of the thread (
https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/wp/wp_stxtco.pdf). But I think it only works for a combinational path, if there are more than one register in the path we need to manually sum clock cycles to Tco of output register.
It looks like TQ considers that report as something legacy information. I suppose it is not a very useful task because I can't locate full path directly from report generated by that task. For me more useful trick is to use Report All I/O Timings Macros and choosing pins needed launch Report Timing commands.
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