Forum Discussion
Altera_Forum
Honored Contributor
9 years agoI thought that I can use a min and max of 0 for set_input/output_delay, it just means that I give information about virtual clock and describe outside-of-FPGA clocking scheme, example of that can be seen on page 15-16 of rysc's TimeQuest User Guide (http://www.alteraforum.com/alterawiki.com/uploads/3/3f/timequest_user_guide.pdf).
Here is my whole sdc file (I changed -max and -min from 0 to 1 just for test, it changes nothing, still reported "No setup paths were found.") : # ************************************************************** # Create Clock # ************************************************************** create_clock -name {CLK} -period 5.000 -waveform { 0.000 2.500 } [get_ports {CLK}] create_clock -name {CLK_EXT_output_side} -period 5.000 -waveform { 0.000 2.500 } create_clock -name {CLK_EXT_input_side} -period 5.000 -waveform { 0.000 2.500 } # ************************************************************** # Create Generated Clock # ************************************************************** derive_pll_clocks # ************************************************************** # Set Input Delay # ************************************************************** set_input_delay -clock CLK_EXT_input_side -max 1.0 [get_ports din1] set_input_delay -clock CLK_EXT_input_side -min 1.0 [get_ports din1] set_input_delay -clock CLK_EXT_input_side -max 1.0 [get_ports din2] set_input_delay -clock CLK_EXT_input_side -min 1.0 [get_ports din2] set_input_delay -clock CLK_EXT_input_side -max 1.0 [get_ports din3] set_input_delay -clock CLK_EXT_input_side -min 1.0 [get_ports din3] set_input_delay -clock CLK_EXT_input_side -max 1.0 [get_ports din4] set_input_delay -clock CLK_EXT_input_side -min 1.0 [get_ports din4] # ************************************************************** # Set Output Delay # ************************************************************** set_output_delay -clock CLK_EXT_output_side -max 1.0 [get_ports dout1] set_output_delay -clock CLK_EXT_output_side -min 1.0 [get_ports dout1] set_output_delay -clock CLK_EXT_output_side -max 1.0 [get_ports dout2] set_output_delay -clock CLK_EXT_output_side -min 1.0 [get_ports dout2] set_output_delay -clock CLK_EXT_output_side -max 1.0 [get_ports dout3] set_output_delay -clock CLK_EXT_output_side -min 1.0 [get_ports dout3] set_output_delay -clock CLK_EXT_output_side -max 1.0 [get_ports dout4] set_output_delay -clock CLK_EXT_output_side -min 1.0 [get_ports dout4]