Honored ContributorHI
we are using the SSRAM CY7C1470V33 in our design (instead of CY7C1380C which is part of the SOPC builder). How do we go about designing the system . Please help us regards, Bhandari
Honored ContributorYou can simply write a simple tcl file which defines your component parameters.
I attached a sample. Change the required parameters and possibly the name to match your sram and copy the file into the altera\<your version>\ip\user_components directory. If you change the file name, keep the _hw.tcl suffix, otherwise sopc builder will not find it. When you refresh the component list in sopc builder, you should find the new sram component in the sram section Regards CrisHonored ContributorHow do I edit the file so that it is compatible with SRAM 512kb on de2 board?
Honored ContributorI have the same quastion. What to do to connect sram on de2 controller to nios2?
Honored ContributorHonored Contributorhow to open the tcl file? i use open using notepad..
Honored ContributorNotepad or any editor. It's a simple text file.
For a 512k sram you'll need to change at least add_interface_port avalon_tristate_slave addr address Input 19 (I used 16 because a simply had a 64kB device) You can initially mantain unchanged the other parameters. Probably this is enough for your first tests with CY7C1470V33. You can then adjust wait cycles to improve access time performance. RegardsHonored Contributorhi, but i am not using CY7C1470V33. mine is IS61LV25616 which is 512KB.
Honored ContributorHello
I have same problem with connectiong sram and flash. I added flash and sram 256x16. Flash from SOPC library and sram with my new component. In sopc project I have 2 address spaces: one for flash and one for sram but I have one space for data: 16 bits. Sram have 16 bit data bus and flash 8 bits. How can I connect flash and sram to one 16 bits bus? Can I split those data buses?Honored Contributorwhat is the model of your SRAM?
Honored ContributorIs61wy256168ll
