Altera_ForumHonored Contributor16 years agoHow to deal with these unused power pins? I have a develop kit, On the board the FPGA used nearly all pins and some banks use different voltage, such as 2.5V,1.8V,3.3V. Recently, I build a new project on this board and only used Bank 1 and B...Show More
Recent DiscussionsPower-Down Sequence Requirements for the Agilex 7 F-Series(2x F-Tile) DevicesRegarding Power-Up Sequence for Agilex 5Cyclone V SoC 5CSXC6 Series GXB Utilization and LimitationsHow to tell Quartus my Arria10 target system CLKUSR frequency is 100MHz?Agilex 3 PLL in Source Synchronous mode ?