how to calculate the board clock skew

hi,

I try to calculate delay value for set_input_delay constraint using the rule below:

input delay (max) = Board Delay (max) - Board clock skew (min) + Tco(max)

= Tdata_PCB(max) + Tco(max) - (Tclk2ext(min) - Tclk1(max))

input delay (min) = Board Delay (min) - Board clock skew (max) + Tco(min)

= Tdata_PCB(min) + Tco(min) - (Tclk2ext(max) - Tclk1(min))

I can get the Tco(max) and Tco(min) from the ASSP's datasheet, so there is no problem with them.

Then I saw a example provided by altera shows that there are no Tdata_PCB(max) and Tdata_PCB(min), but just one value---Tdata_PCB.

I think I can calculate it by 1ns/15cm.

but when I turn to board clock skew, the example uses two values: 0.5 for Tskew(max) and -0.5 for Tskew(min).

so my question is how to calculate/determine the board clock skew(max/min)?:confused:

thanks

yibin

:)