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Altera_Forum
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18 years ago

How to activate the built-in clock inverter in LE?

Hi All, I'm using Cyclone EP1C6. The clock is supplied via pin152 (CLK3). For some purpose, I use the falling edge as active edge. This clock also connects to an on-chip memory block. A...
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Altera_Forum
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18 years ago

Brad & HDL Guru,

Thank you for your kind relply!

There is no additional logic in the clock path.

I didn't invert the clock manually by any inverter, but simply use always@(negedge clk).

There is a "keep" attribute on the clock net. After I remove the attribute and recompile the design, the critical warning disappears. And I see the inverter has been moved into LE.

Thank you for your help! :-)

Aaron