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songsong96's avatar
songsong96
Icon for New Contributor rankNew Contributor
3 years ago

How do I select an FPGA chip with a high-speed system clock available?

Our team wants to implement an FPGA system that controls DAC Resolution 1ns width. The FPGA now in use is using Cyclone V (5ceba2f23c7). The 40MHz crystal clock is received from the outside, multipl...
FakhrulA_altera's avatar
FakhrulA_altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi songsong96,


Thank you for reaching out.

Just to let you know that Intel has received your support request and I am assigned to work on it.

Allow me some time to look into your issue. I shall come back to you with the findings.

Thank you for your patience.

Best regards,