high speed pulse generation

I will need LVDS to TTL buffers, but that is no problem. I am more concerned that there is some flaw in my scheme. I can read those cyclone or stratix data sheets for hours and still not come away with any certainty. After some thought, I realize my description of what I need is misleading. The basic requirement is to xmit a pulse on both chA and chB, with programatic control of the delay between them. The duration of the pulses is not critical, but the delay between channels must be accurate to 1ns in a range from 0 to 250ns. If there is a better way to this than what I have described, let me know.