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hi
I'm trying to get the sound from adc and send the data to the dual port ram and i will control the system with nios but the most important part :when we get the data from WM8731; ı want to check the data like the leftdata and the right data . one port of ram will take the right data ,the other port of ram will take the leftdata .
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Usually, you use one port of RAM for input and the other for output. I am thinking you are making both ports read/write?
I would have one RAM for left channel data and another RAM for right channel data.
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ı run your adcdac controler code
and at first and second trying it is compiled. but now it is not .
ı hear the voice from only left side .
ın wm8731 datasheet some parameters (for ex. chipselect volume and etc but where did you define to use the left or right side ? how can use 2 part ?please help :S
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You can't "run" my "code". You mean that you are synthesizing my hardware description.
Anyway, I have reposted a student project in the link above. It also includes a detailed report on how the design works (check Report folder). In addition, the student project also includes simulating a set of nonlinear differential equations using Euler's method (note that this was originally Cornell University's Differential Analyzer, as cited in the project).
This should hopefully help you in understanding how to send data to and from the audio codec to a module (in this case neuronModel.vhd). You should configure the mega IP wizard FFT module and use it instead of the neuronModel.
Good luck.
Bart