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Altera_Forum
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15 years ago

help for audio codec using VHDL

i am a begineer at using altera DE2 board and VHDL. i have to complete my project with in 10 days time but dont have any idea of where to start and how.. help ......... i need to build a duplex au...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

hi

I'm trying to get the sound from adc and send the data to the dual port ram and i will control the system with nios but the most important part :when we get the data from WM8731; ı want to check the data like the leftdata and the right data . one port of ram will take the right data ,the other port of ram will take the leftdata .can you help me ? after that i will take fft so complicated . ı run your adcdac controler code

and at first and second trying it is compiled. but now it is not .

ı hear the voice from only left side .

ın wm8731 datasheet some parameters (for ex. chipselect volume and etc but where did you define to use the left or right side ? how can use 2 part ?please help :S