Forum Discussion
Altera_Forum
Honored Contributor
15 years agoHi Flinders.
I have this problem. I instaled Quartus II 10.0sp1 web edition. I make this VHDL file LIBRARY ieee ; USE ieee.std_logic_1164.all ; ENTITY light IS PORT ( x1, x2 : IN STD_LOGIC ; f : OUT STD_LOGIC ) ; END light ; ARCHITECTURE LogicFunction OF light IS BEGIN f <= (x1 AND NOT x2) OR (NOT x1 AND x2) END LogicFunction ; which is regular. I compile it and a get no warnings or errors. Now when I remove the semicolon from line where f is defined compiler reports no error at all. I think that it should report that "; is expected" or something like that. The code with error is: LIBRARY ieee ; USE ieee.std_logic_1164.all ; ENTITY light IS PORT ( x1, x2 : IN STD_LOGIC ; f : OUT STD_LOGIC ) ; END light ; ARCHITECTURE LogicFunction OF light IS BEGIN f <= (x1 AND NOT x2) OR (NOT x1 AND x2) END LogicFunction ; Why isn't my compiler working? (the device is MAXII) And ofcourse Compilation report says data not available.