Forum Discussion
Altera_Forum
Honored Contributor
15 years agoHi,
that was my thought, but ALTERA themselves provide this solution. I took a look in the referenced section in the Cyclone Handbook and they provide a calculation regarding this resistor as well. Regarding the "missing diode" during configuration - yes the diode is not active during configuration and thus the pin may not be driven actively during configuration. As the input to the FPGA is the output of the ADC, I think this could be achieved by assuring the ADC is in reset condition until the FPGA releases the reset. Thus the output pin of the ADC should (if at all) just have a internal "weak" pull up connected to 5V - not driving actively during configuration. Nevertheless - I would not implement this solution in a new design - I assume the 5V devices to get obsolescent during the next years (or rise in price to be unattractive...) Carlhermann