how can i retrieve a frame from my camera?
That's my top..
always@(posedge CCD_PIXCLK)
begin
rCCD_DATA <= CCD_DATA;
rCCD_LVAL <= CCD_LVAL;
rCCD_FVAL <= CCD_FVAL;
end
VGA_Controller u1 ( // Host Side
.oRequest(Read),
.iRed(Read_DATA2),
.iGreen({Read_DATA1,Read_DATA2}),
.iBlue(Read_DATA1),
// VGA Side
.oVGA_R(VGA_R),
.oVGA_G(VGA_G),
.oVGA_B(VGA_B),
.oVGA_H_SYNC(VGA_HS),
.oVGA_V_SYNC(VGA_VS),
.oVGA_SYNC(VGA_SYNC),
.oVGA_BLANK(VGA_BLANK),
// Control Signal
.iCLK(VGA_CTRL_CLK),
.iRST_N(DLY_RST_2)
);
Reset_Delay u2 ( .iCLK(CLOCK_50),
.iRST(KEY),
.oRST_0(DLY_RST_0),
.oRST_1(DLY_RST_1),
.oRST_2(DLY_RST_2)
);
CCD_Capture u3 ( .oDATA(mCCD_DATA),
.oDVAL(mCCD_DVAL),
.oX_Cont(X_Cont),
.oY_Cont(Y_Cont),
.oFrame_Cont(Frame_Cont),
.iDATA(rCCD_DATA),
.iFVAL(rCCD_FVAL),
.iLVAL(rCCD_LVAL),
.iSTART(!KEY),
.iEND(!KEY),
.iCLK(CCD_PIXCLK),
.iRST(DLY_RST_2)
);
RAW2RGB u4 ( .iCLK(CCD_PIXCLK),
.iRST(DLY_RST_1),
.iDATA(mCCD_DATA),
.iDVAL(mCCD_DVAL),
.oRed(sCCD_R),
.oGreen(sCCD_G),
.oBlue(sCCD_B),
.oDVAL(sCCD_DVAL),
.iX_Cont(X_Cont),
.iY_Cont(Y_Cont)
);
wire cinza;
RGB2GRAY u9 (
.clk (CCD_PIXCLK),
.val (sCCD_DVAL),
.iRED(sCCD_R) ,
.iBLUE(sCCD_B) ,
.iGREEN({sCCD_G,sCCD_G}),
.oGRAY(cinza)
);
SEG7_LUT_8 u5 ( .oSEG0(HEX0),.oSEG1(HEX1),
.oSEG2(HEX2),.oSEG3(HEX3),
.oSEG4(HEX4),.oSEG5(HEX5),
.oSEG6(HEX6),.oSEG7(HEX7),
.iDIG(Frame_Cont)
);
sdram_pll u6 (
.inclk0(CLOCK_50),
.c0(sdram_ctrl_clk),
.c1(DRAM_CLK)
);
assign CCD_MCLK = rClk;
//AQUI ENTRAM 10BITS VERDE,VERMELHO E AZUL
Sdram_Control_4Port u7 ( // HOST Side
.REF_CLK(CLOCK_50),
.RESET_N(1'b1),
.CLK(sdram_ctrl_clk),
// FIFO Write Side 1
.WR1_DATA({1'b0,cinza,cinza}),
.WR1(sCCD_DVAL),
.WR1_ADDR(0),
.WR1_MAX_ADDR(640*480),
.WR1_LENGTH(9'h100),
.WR1_LOAD(!DLY_RST_0),
.WR1_CLK(~CCD_PIXCLK),
// FIFO Write Side 2
.WR2_DATA( {1'b0,cinza,cinza}),
.WR2(sCCD_DVAL),
.WR2_ADDR(22'h100000),
.WR2_MAX_ADDR(22'h100000+640*480),
.WR2_LENGTH(9'h100),
.WR2_LOAD(!DLY_RST_0),
.WR2_CLK(~CCD_PIXCLK),
// FIFO Read Side 1
.RD1_DATA(Read_DATA1),
.RD1(Read),
.RD1_ADDR(0),
.RD1_MAX_ADDR(640*480),
.RD1_LENGTH(9'h100),
.RD1_LOAD(!DLY_RST_0),
.RD1_CLK(~VGA_CTRL_CLK),
// FIFO Read Side 2
.RD2_DATA(Read_DATA2),
.RD2(Read),
.RD2_ADDR(22'h100000),
.RD2_MAX_ADDR(22'h100000+640*480),
.RD2_LENGTH(9'h100),
.RD2_LOAD(!DLY_RST_0),
.RD2_CLK(~VGA_CTRL_CLK),
// SDRAM Side
.SA(DRAM_ADDR),
.BA({DRAM_BA_1,DRAM_BA_0}),
.CS_N(DRAM_CS_N),
.CKE(DRAM_CKE),
.RAS_N(DRAM_RAS_N),
.CAS_N(DRAM_CAS_N),
.WE_N(DRAM_WE_N),
.DQ(DRAM_DQ),
.DQM({DRAM_UDQM,DRAM_LDQM})
);
assign UART_TXD = UART_RXD;
I2C_CCD_Config u8 ( // Host Side
.iCLK(CLOCK_50),
.iRST_N(DLY_RST_2),
.iZOOM_MODE_SW(SW),
.iEXPOSURE_ADJ(KEY),
.iEXPOSURE_DEC_p(SW),
// I2C Side
.I2C_SCLK(GPIO_1),
.I2C_SDAT(GPIO_1)
);
endmodule