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i have the following (maybe strange) problem:
My design is very modular and will be configured by a setup file
(pkg)! This setup file defines wether specific modules are generated
or not.
For a special reason only the generated modules should now become an
individual (increasing) number as an address, e.g. in a generic! This
is only for configuration!!
I am thinking of a kind of a function with a "Global Variable" there,
which is intialized (to 0) at the beginning and increased by one every
time a module is instanciated (the function called)!! This is easy in
a procedural language but i can not find any construction in VHDL,
which could do this.
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Rather than having your generic values hard-coded by storing them in a package, use the Quartus and Modelsim Tcl scripting capabilities to set generics inside a loop.
For example, I have a board with four identical FPGAs. The FPGAs get programmed with a device ID (0 to 3) and that device ID is compared to a pin strapping device ID (also 0 to 3). In the unlikely event that I concatenate the RBF files in the wrong order, and hence program the wrong FPGA with the wrong image, then the device ID check will fail, and the boards will not enable their I/O drivers, avoiding the potential for I/O driver conflicts.
The Tcl script goes something like this;
1) Get the current OS timestamp
2) for {set i 0} {$i < 4} {incr i} {
* set the device ID generic to i
* set the timestamp generic
* synthesize
* copy the RBF to a unique name
}
3) Concatenate RBF files into a single image for download via FPP configuration.
If you have a design where you want to track how many of something are instantiated, then you could use Tcl variables to track the start index and number used by a particular design instance, and continue to track the number through what I assume are multiple synthesis runs.
Cheers,
Dave
Honored Contributor
