There is absolutely no problem driving a GMII/RGMII interface with a Cyclone IV, using LVCMOS DDR I/O, and any pin can be used for them. If possible it is better to use a dedicated clock input for the receive clock as it will make meeting timing requirements easier. You can also use a pll output pin for the transmit clock but I don't think it's absolutely necessary.
The cyclone iii development kit (
http://www.altera.com/products/devkits/altera/kit-cyc3.html) uses a RGMII interface to a Marvel PHY, you can have a look at the schematic to see how they did it.