Forum Discussion
Altera_Forum
Honored Contributor
12 years agoI integrated this block in a Stratix IV with quartus 12.0 and it worked(I didn't write the SW for it). But there is a big however, the block was written for a clock of 50MHz and all timings are fixed. So clocking at an higher speed can be a problem for the LCD timings. Maybe this is already fixed in the new quartus versions (but i doubt altera fixes bugs, they only seems to create more bugs). It might be best to check the timings with a scope first(or signaltap).