Generating PWM in cyclon2

Hello

I am trying to write codes to generate PWM pulses in my FPGA, but it seems it does not funtion. The input "rst" reset the program but it does not synchronize with the "rst" input. Can any one help me please!!!

entity pwm_out is

port(

clk : in std_logic;

rst : in std_logic;

loadin : in std_logic_vector(15 downto 0);

pwmout : out std_logic);

end entity;

architecture pwm_out of pwm_out is

signal cnt : std_logic_vector(16 downto 0):= "00000000000000000";

begin

process (clk, loadin)

begin

if (rising_edge(clk)) then

if (rst = '1') then

cnt <= ("0" & loadin);

else

if (rst = '0') then

cnt <= (cnt+1);

end if;

end if;

end if;

end process;

pwmout <= cnt(16);

end pwm_out;