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Altera_Forum
Honored Contributor
17 years agoGenerating PWM in cyclon2
Hello I am trying to write codes to generate PWM pulses in my FPGA, but it seems it does not funtion. The input "rst" reset the program but it does not synchronize with the "rst" input. Can any o...
Altera_Forum
Honored Contributor
17 years agoHi Sameer,
did you solve your problems with the PWM? You have a synchronized reset input. What if you use an asynchronized reset? ... begin process (clk, rst) begin if (rst = '1') then cnt <= ("0" & loadin); elsif (rising_edge(clk)) then cnt <= (cnt+1); ...