Generating "Native" Serdes XCVR on Agelix7

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Hi,

Can you please share

1. The IP name you are trying to use.
2. Quartus Version.
3. FPGA device ID you are using.

You can check JESD204C, it has option to select Base or PHY only. Kindly check.

Regards,

Harsh M

Hi,

I would like to inquire if there have been any updates.

If you need more time for this, appreciate if you can provide me with a timeline.

Looking forward to hearing back from you soon.

Regards,

Harsh M

Hi all

I was looking deeper on the Datasheet and understand that I need to use F-Tile PMA/Fec Direct Phy IP using the FGT PMA configuration rules : Basic.

I was able to generate and now on the simulation phase.

Thank you

Eyal Gutman

Hi,

I would like to follow up with you about this case.

Do you have any further questions on this?

Otherwise, I will put this case to close-pending, and please feel free to reopen within 20 days if you have further

clarification.

Regards,

Harsh M