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Altera_Forum's avatar
Altera_Forum
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13 years ago

Generating an automated do file with Hierarchy for Modelsim

Dear all

I am working with a project which contains 100's of vhd files issue is that whenever i need to run modelsim i need to add these files to project and compile all

Instead i want to generate a do file using TCL which reads vhd files in each subdirectory and generates a do file that modelsim accepts

Its a onetime process and easy too

My problem is that i can read vhd files and write it to as a do file but the hierarchy of compilation is important as modelsim throws the error

Hierarchy of the design is known to Quartus tool but when i open the qsf file i dont see them arranged in hierarchy order

Can any one help me how to easily generate this do file with a proper hierarchy in consideration

Thanks in advance

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    Its a onetime process and easy too

    --- Quote End ---

    Ideally you would be able to treat the problem like C-code, where you can run a tool to find the dependencies, i.e., the ordering. I have not been able to find a tool that does this well.

    I've tried Modelsim's makefile generator, but it only creates a makefile *after* you have a project working.

    Its a tricky problem with VHDL, since;

    1) If your component uses a package, the package needs to be compiled first.

    2) If your package uses another package, eg., a utilities or types package, that utilities package has to be compiled first.

    3) If you have have a component definition only, with no entity with the same name, and configurations are used to create instances of the component (i.e., you map a component with a different name onto the component definition), then creating a dependency tool would require a VHDL parser.

    The package-to-package dependency in (2) makes using a simple naming convention difficult, since utilities_pkg.vhd comes so late in the alphabet :)

    The best solution is simply to write a Tcl procedure that puts the source files in order. If you do use a naming convention, eg., _pkg.vhd for packages, you can search for all packages using Tcl glob, and then just pull out the one or two utility packages and compiled them first. For example ...

    
       #  'control' library packages
        set control_pkg 
        
       #  The 'utilities_pkg' needs to come first in the
       #  compile order since other packages depend on it.
       # 
       #  Index of the utilities package in the list
        set index 
        if {$index == -1} {
            error "Error: the utilities package (utilities_pkg.vhd) is missing!"
        }
       #  Create a new list
        if {$index > 0} {
            set control_pkg ] 
                 end] 
            ]
        }
    

    You can put this script in a common area, and set the path to it using the environment variable TCLLIBPATH (which works under both Linux and Windows for Quartus Tcl and Modelsim Tcl).

    Cheers,

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    Hi DAVE

    Thanks for your advice

    --- Quote Start ---

    then creating a dependency tool would require a VHDL parser.

    --- Quote End ---

    In my design there are a few packages that i can manually rearrange them

    Mostly my frustration comes out from rearranging almost 200 vhdl files as per hierarchy

    As per your advice i need to parse the VHDL (starting from TOP) file for either component definitions or entity work.instancename

    Can you help me with parsing files using TCL (if u already modeled as such)

    else i will try and revert back if i succeed
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    --- Quote Start ---

    In my design there are a few packages that i can manually rearrange them

    --- Quote End ---

    Great. So list them in a text file, or create a Tcl procedure that returns the list of packages. You can then have your Tcl simulation/synthesis script use that file to determine the list of packages.

    --- Quote Start ---

    Mostly my frustration comes out from rearranging almost 200 vhdl files as per hierarchy

    As per your advice i need to parse the VHDL (starting from TOP) file for either component definitions or entity work.instancename

    --- Quote End ---

    If you don't care that your build system is coarser than required, i.e., files get rebuilt when they do not need to, then just setup your script so that it;

    1) Read the list of packages

    2) Read all files in the source area

    3) Remove the packages from the list of all files. You now have two lists; packages and source.

    4) Create libraries and compile the packages into the libraries, followed by the source.

    If anything in the source list changes, just compile that individual source file. If anything in the packages list changes, then compile the package and all source (since that saves having to determine which source really depends on which package).

    See how well that works out.

    Cheers,

    Dave