Generate patterns through CPLD(MAXII)?

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It's attractive to me.

How can I realize it?

1. Which MCU is recommended at which platform (EVB)?

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Any of the ARM processor cores are very good.

For example, ST just released a ARM core with a single-precision floating-point unit (TI and Freescale also have similar parts). This STM32 kit was being given away last week, but it looks like the link for the free kit is gone now;

http://www.st.com/internet/evalboard/product/252419.jsp

However, the board is $20

http://parts.digikey.com/1/parts/2484058-eval-kit-stm32f-discovery-stm32f4discovery.html

So its close to free :)

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2. How to utilize it's ADC for power measurement?

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You need to figure out what is the minimum current you need to measure, and at what accuracy. You then need a current sensing circuit and an amplifier (op-amp) to increase the signal level. Sometimes the current-sensing circuit is built using op-amps.

If you have never used op-amps, read the TI reference book from Ron Mancini called "Op-amps for everyone";

http://www.ti.com/lit/an/slod006b/slod006b.pdf

eg., p193 Chapter 12 Instrumentation: Sensors to A/D Converters.

There are 'current sensor' circuits that incorporate the op-amps and logic. You'll have to look around TI, Analog Devices, Linear Technologies, etc web sites.

Cheers,

Dave

It's attractive to me.

How can I realize it?

1. Which MCU is recommended at which platform (EVB)?

2. How to utilize it's ADC for power measurement?

Thanks.

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I think that I can measure that by external power supply.

That could reduce the complexity to new FPGA users like me.

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If you want to measure the power used by a microcontroller in deep sleep modes, and during operation, you will need an accurate measurement setup, i.e., your power supply must be very nice ($$$). If you use an analog-to-digital converter and a microcontroller and some voltage and/or reference circuits, you can calibrate your circuit, and then use that to measure the micro power consumption.

So 'complexity' is required, it just depends where you want it and whether you want to pay for it.

Cheers,

Dave

I think that I can measure that by external power supply.

That could reduce the complexity to new FPGA users like me.

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I don't get it. Why I need an ADC for analog sensing?

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You said you wanted to measure Idd/power consumption? How are you planning on getting that into the CPLD/FPGA? They only speak digital.

Cheers,

Dave

Hi, Dave,

I don't get it. Why I need an ADC for analog sensing?

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I need to correct my statement.

1. My intention is to have simple test to microcontrollers (not specific one). For ex. Idd/power consumption, flash operation.

2. Some MCUs are not desgined with JTAG interface for test but they have similar serial interfaces (may be some specific protocols) that I have to deal with. Each one might be different.

3. As a result, I plan to use FPGA to generate patterns to access the chips. The patterns that I need to geneate would around be 2-10 pins. And there will be up to 10~30 types of patterns for each pin to enter test mode and setup control signals.

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For that you will need an ADC and analog power sensing circuits.

There's nothing wrong with using an FPGA for this, but I would personally implement this type of logic using a microcontroller. It sounds mostly like bit banging.

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As a result, I need to make up my mind:

1. Which FPGA/CPLD would be suitable for me

2. How to generate patterns, simply through shift registers and input patterns from my laptop?

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Any FPGA or CPLD is suitable. An FPGA has the advantage of having on-chip memory that can be used for the logic analyzer, and have more logic elements, but they need a boot device, since they are SRAM based. Before selecting an FPGA, you need to determine what your analog sensor requirements are.

Cheers,

Dave

Hi Dave,

Sorry to let you wait.

I need to correct my statement.

1. My intention is to have simple test to microcontrollers (not specific one). For ex. Idd/power consumption, flash operation.

2. Some MCUs are not desgined with JTAG interface for test but they have similar serial interfaces (may be some specific protocols) that I have to deal with. Each one might be different.

3. As a result, I plan to use FPGA to generate patterns to access the chips. The patterns that I need to geneate would around be 2-10 pins. And there will be up to 10~30 types of patterns for each pin to enter test mode and setup control signals.

As a result, I need to make up my mind:

1. Which FPGA/CPLD would be suitable for me

2. How to generate patterns, simply through shift registers and input patterns from my laptop?

best regards,

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I am thinking about how to create a platform in order to have direct access to these MCUs.

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What do you mean by 'direct access'? You commented on accessing the flash on these devices, but the flash is internal. The only way to get to the flash is via the JTAG port on the device, and while you could implement that using an FPGA, what is the point, just buy a cheap JTAG interface.

Perhaps you could clarify what you want the FPGA to be able to do to the microcontroller.

Cheers,

Dave

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Provide a better description on what the patterns are supposed to be and we can provide a better answer. For example, do you have hundreds of individual bits/wires that you need to generate patterns on, are the patterns all the same, what frequency do you need to generate the patterns at?

The ARM MCUs already come with these features, why do you need an FPGA?

Cheers,

Dave

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Hi Dave,

Just as what you mentioned, MCUs provide all the access to these functions. But I don't have their EV boards. It's quite embarrassing that sometimes I have to debug those MCUs during it's development stages. In most cases, low power leakage and flash access are the problems I see. These are not my own product, however, I sometimes been asked to do so. As a result, I won't have EV board to test them. And I am thinking about how to create a platform in order to have direct access to these MCUs. I know it's strange, but it's a problem to me now.

I wastold that it can be down with FPGA platform. That's why I'm here.