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Altera_Forum's avatar
Altera_Forum
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11 years ago

Generate LVDS diff pair output

Hello all,

I am now using EP4CE15, and trying to generate the LVDS diff pair output with the internal PLL.

I have no ideal on how to get it done. I saw there is a transmitter and receiver of LVDS megawizard, but I dont know which to select and also I trying to find out the connection for tx_in(I know should be connecting to data, but which data?) and also, tx_inclock(I knoiw is ref clk but which one) and the deserialization factor, how should I select it if I would like to generate the LVDS diff pair

Hope somebody from here can help me out on this matter.

TY

Jason

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    11 years ago

    I suggest you read up on the ALTLVDS_TX module, details of which can be found here: lvds serdes transmitter/receiver (http://www.altera.com/literature/ug/ug_altlvds.pdf)

    It's a very comprehensive document and, perhaps, a little daunting. So, I'll draw your attention to the deserialization factor discussed on page 3. Valid input clock rates are briefly discussed on page 4 and in more detail further into the document.

    Alternatively, if you simply want and LVDS compliant pin pair, you can simply specify this in the pin planner. You need only use the ALTLVDS_TX megafunction if you need the deserialization facility.

    Regards,

    Alex