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Honored Contributor
Honored ContributorGenerate LVDS diff pair output
Hello all, I am now using EP4CE15, and trying to generate the LVDS diff pair output with the internal PLL. I have no ideal on how to get it done. I saw there is a transmitter and receiver ...
Altera_ForumHonored Contributor
Honored ContributorI suggest you read up on the ALTLVDS_TX module, details of which can be found here: lvds serdes transmitter/receiver (http://www.altera.com/literature/ug/ug_altlvds.pdf)
It's a very comprehensive document and, perhaps, a little daunting. So, I'll draw your attention to the deserialization factor discussed on page 3. Valid input clock rates are briefly discussed on page 4 and in more detail further into the document. Alternatively, if you simply want and LVDS compliant pin pair, you can simply specify this in the pin planner. You need only use the ALTLVDS_TX megafunction if you need the deserialization facility. Regards, Alex
