Hi, i have four FIR filters and i want to control the gain in the output of each filter and then sum their outputs. The result is sended to an DAC. it is possible to control the gain in fpga?

--- Quote Start --- i have four FIR filters and i want to control the gain in the output of each filter and then sum their outputs. The result is sended to an DAC. it is possible to control the gain in fpga? --- Quote End --- There's a couple of solutions; 1) Add a gain block (multiplier) between each FIR filter output and the summing block. 2) If the FIR filter coefficients are re-loadable, then use the coefficients to implement the gain function, by scaling them appropriately. The second option requires a little care regarding the dynamic range of the signals. However, depending on the bit-widths of your signal and coefficients, the scaling may be available 'for free', eg. lets say you have a design with 16-bit data and coefficients, and the design is using hardware multiplers, because the multipliers are 18x18-bit, you have a couple of extra bits that you can use for the gain function. If that is sufficient, then you get your gain function for free. Cheers, Dave

Dear Dave, thank you for your reply. i'm just wondering why everybody control the gain using an amplifier. I need to change the gain in steps of 1 db till 20 dB. If DAC can handle this? thank you.

--- Quote Start --- thank you for your reply. i'm just wondering why everybody control the gain using an amplifier. I need to change the gain in steps of 1 db till 20 dB. If DAC can handle this? --- Quote End --- The reason has to do with dynamic range. Given a B-bit DAC, you can create a signal with at-best a dynamic range of about 6dB per bit. If you were to implement 20dB of gain variation in the digital domain, then you would be using up 3 to 4-bits of your DAC to perform that function. If you only needed 8-bits of dynamic range, and you were using a 12-bit DAC, then great, you can do it digitally. However, even with that level of control, if the DAC output is too small relative to whatever the voltage you need is, then you have to have an amplifier. You'd likely need this amplifier anyway, as part of an analog filter to remove higher-frequency images from the DAC output (since it has a sort-of stair-case like response for an ideal DAC). So your two options are; 1) DAC with extra bits, digital gain control, and a fixed-gain amplifier/filter. 2) DAC with just-enough bits, and a variable-gain amplifier/filter with analog gain control (actually the control bits will be digital, but the gain on the analog signal would be 'analog'). Is that clearer? Cheers, Dave

Yes, but now supose im using 14 bits and i have 5 FIR filters, The filters output are 14 bits. If i sum the outputs of the filters overflow will occurs. So how can i handle this? I wont a 0 dbm for each FIR output seen in the DAC output.

--- Quote Start --- Yes, but now supose im using 14 bits and i have 5 FIR filters, The filters output are 14 bits. If i sum the outputs of the filters overflow will occurs. So how can i handle this? --- Quote End --- First, you need to work out if you need 14-bits of precision in your FIR filter output. If you know the input signal characteristics, and the FIR filter response, then you can calculate the RMS of the signal and the RMS of the noise, and from that you can determine the minimum number of bits you require. For now, lets assume you need 14-bits, but you should check. When you add two B-bit values together, you get worst-case bit-growth of 1-bit, so for your 5 filters, you will get a bit growth of a little over 2-bits. If your input RMS is lower than its maximum possible value, then you probably only need to grow the result by 2 bits. If the noise in your signal is random, then its variance will add, so the variance in the sum will be 5 times the variance of the input (assuming each input has the same noise), so the noise power will increase by sqrt(5) = 2.24, i.e., a little over 1-bit, so your dynamic range might increase slightly (depending on whether the 'signal' is also noise-like or whether it is coherent). I assume you have a 14-bit DAC, and that is why you have scaled your FIR filter outputs to 14-bits. However, your sum will be around 16-bits, so you will need to convergent round the wider sum to 14-bits so that you can drive the DAC. Does that make sense? --- Quote Start --- I want a 0 dBm for each FIR output seen in the DAC output. --- Quote End --- No you probably don't. You want the largest possible signal your DAC can output, within the constraints of the sampling bandwith, and the inverse sinc filter response (assuming you have such a filter). The DAC output power into a 50-ohm load, or the power in dBm, will be whatever the board designer decided it will be. There's not much you can do about it, other than use what your board design has. You have not provided details on that, so I can't comment more. Cheers, Dave

Gain control using fpga | Altera Community

12 Replies

Altera_Forum
Honored Contributor
14 years ago
Hi Dave,
thank you again for your replay. I'm considering everything you say.
For now i need help in the follwing:
supose i have a 14 bit DAC whit 1 Vp full scale. Maping the voltagein a 14 14 bit signed representation a have that 8191~=1V and -8192 = -1 V. suppose that my original signal has gain A and a i need to increase/decrese the gain by 1 dB (1.1220 V). How could i represent this number (1.1220) in the 14 bit fixed point representation considering that my range is from 1 to -1? Is that make any sense for you? If not, just help me on implemeting a system with gain control.

thanks.
Altera_Forum
Honored Contributor
14 years ago
+1 dB means (10^(1/20) = 1.220 ratio (not V). -1dB means (10^(-1/20) = 0.8193 ratio. so all you have to do is scale your 14 bit data accordingly.
for +1dB scale your data level up by 1.22.
for -1dB scale your data level by 0.8193

dB is just ratio, it is not absolute value. Confusion is common and is due to this odd case when a ratio seems like having a unit dB while in maths any ratio of same parameters must be unitless.

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Gain control using fpga

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