FPGA to SDRAM port access problem

Hello,

I have a data file that is read by the HPS... I'm assuming the data block is stored in the SDRAM. This is the C code I used:

volatile char *address_pointer = (char*)malloc(bufflength1); //bufflength1 is length of datablock. Approx< 65k.

n=fread(address_pointer,bufflength1,1,f);

When I debug, address_pointer = 0x043CB178

This is the same address I tell the master to start reading the data from...

I want the FPGA to read this data block and process it (and eventually return results to the HPS).

I implemented FPGA-SDRAM Avalon-MM port in the HPS. There is a read master (fft_memory in Fig 1) that connects to the fpga-sdram slave.

The master however fails to read data as the master_wait_request is always high.

Is there something else I need to set/reset before trying to use the SDRAM from the FPGA end??

or is there any other concept like base addresses/ offset that I need to take into consideration?

Any help is appreciated!!