fpga startup problem

Hi,

Are you trying to say, That you have programmed a code to blink single led on the board and you are see different result?

1.Are you using development board / custom board?

2. Check the pin assignments.

or

2.Write a simple code to control led via.

Best Regards,

Anand Raj Shankar

(This message was posted on behalf of Intel Corporation)

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Hi,

Are you trying to say, That you have programmed a code to blink single led on the board and you are see different result?

1.Are you using development board / custom board?

2. Check the pin assignments.

or

2.Write a simple code to control led via.

--- Quote End ---

Thanks for the answer.

I'm trying to say that, probably, my chip does not start.

I wrote a simple code that activates the LED. When power is applied, this LED blinks once and nothing happens.

module main (output signal_1);
reg signal_1_r;
assign signal_1 = signal_1_r;
always 
begin
	signal_1_r <= 0;
end
endmodule

I checked the status pins, and it seems to me that "configuration error".

The other day I inserted a card in the pci-e connector and I even have the LED does not light at the start. I do not even know what to think. Yesterday I still checked the CRC_ERROR pin, but there is constantly 2.4 volts and I do not see anything else.

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Hi,

1.Are you using development board / custom board?

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development board Gidel proce V

https://www.altera.com/solutions/partners/partner-profile/gidel--inc-/board/procev-gx--pcie-based-100g--ultra-low-latency-platform.html

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I found that the conf_done pin is connected through a 10k resistor not to Vccpgm (3V), but connected through a 10k resistor to a neighboring i/o pin

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HI,

Okay, problem solved?

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HI,

Okay, problem solved?

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I do not know yet. The chip never starts.

conf_done = 0.7v = pulled low

nStatus = 0.7..1.3v =pulled low and then high

These signals, according to the documentation, mean configuration error (from epcq256 by active serial).

At the same time, the programmed user LEDs light up and go out at once (they should glow constantly). This means that the FPGA is still being configured.

I read that this is the error of the crc sum, but I have not yet figured out how to solve it.

I also worry that when I program in quartus my epcq256 , the first 26% of the process takes a long time (about 3-4 minutes), and then the process goes to 100% very quickly (in 1 second). At the same time he writes that everything went well.

On another my chip (cyclone IV) the process is smoothly slow all 100%. Maybe this is where the problem lies.

Hi,

1.Have you programmed sof file successful?

2.Is nStatus low form power on state?

When the nSTATUS is low, the possibility is either due bit-stream corruption or power issue.

Best Regards,

Anand Raj Shankar

(This message was posted on behalf of Intel Corporation)

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Hi,

1.Have you programmed sof file successful?

Best Regards,

Anand Raj Shankar

(This message was posted on behalf of Intel Corporation)

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Hello, thanks

Jtag does not start. I can not program sof

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Hi,

2.Is nStatus low form power on state?

When the nSTATUS is low, the possibility is either due bit-stream corruption or power issue.

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In verilog, i program the user LEDs so that they are always on. When the power is turned on, these LEDs blink 1 time and nStatus smoothly changes its value from 0.7v to 1.3v and back.

Could you tell me at which points (pins), you can check the power? I have control points 0.9, 2.5, 3, 3.3 on the board, they all show the correct values

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Hello, thanks

Jtag does not start. I can not program sof

In verilog, i program the user LEDs so that they are always on. When the power is turned on, these LEDs blink 1 time and nStatus smoothly changes its value from 0.7v to 1.3v and back.

Could you tell me at which points (pins), you can check the power? I have control points 0.9, 2.5, 3, 3.3 on the board, they all show the correct values

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If you say the Jtag does not start, then in your earlier message , are you referring to the compilation process?.

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I also worry that when I program in quartus my epcq256 , the first 26% of the process takes a long time (about 3-4 minutes), and then the process goes to 100% very quickly (in 1 second). At the same time he writes that everything went well.

On another my chip (cyclone IV) the process is smoothly slow all 100%. Maybe this is where the problem lies.

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A few things:

1. Have you assigned a valid pin to signal_1 ? (which is connected to the User LED - usually given in the user manual along with the development board. This assignment will be made in the QSF file or in a TCL file which you can source). If you do not manually assign a valid pin, it will not work.

2. Ensure the JTAG connection detects your board, and program it using the correct FPGA sof file.

If you can give us more details about the process you are following, we can help.

Hi,

It is a power issues

If the POR monitored power supplied (from Table 11-2: Power Supplies Monitored and Not Monitored by the Stratix V POR Circuitry) does not reached and stay the appropriate voltage level, the nSTATUS will be low. You can check each power supply voltage level requirement from the datasheet.

Best Regards,

Anand Raj Shankar

(This message was posted on behalf of Intel Corporation)