FPGA Security Question

I am currently using the Intel Max 10 and Cyclone IV FPGA chips in my designs. Most of my designs will enter into classified areas. In order to bring those designs out of those areas and back to my workstation which is unclassified I must ensure nobody could have written any classified information to the EPCQ memory device or the in system programmable device (Max 10). I know the Stratix versions have this kind of protection but does any know of or have an idea how I can ensure the devices mentioned above can not be written to? Maybe a password? I thought of maybe storing the firmware on a ROM chip that the FPGA could read when powered up but can not find one that has compatible pinout as the EPCQ. Anyone got any ideas? Should I base my designs around another chip? If so which one?

Thank you!