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Altera_Forum's avatar
Altera_Forum
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13 years ago

FPGA remote upgrade question

Hello, I'm designing a PCB with a Cyclone IV FPGA on it. It will connect to another board with a CPU via an SPI bus. I need to enable a remote upgrade of the FPGA image by the CPU. I read the Conf...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

At first I thought that I should right 2 different blocks in the FPGA, the first is SPI slave that connects to the CPU and transfers the data to the second block, which is an SPI master that connects to the EPCS and writes the data.

Now I thought of a better idea - actually I can wire the SPI bus from the CPU directly to the EPCS (by "wire" I mean in the FPGA) so that the CPU will write the EPCS with no additional logic in the FPGA, correct?

In any case I don't need any additional GPIOs between the FPGA and the CPU except the ones used for SPI, right?