Could someone provide some PCB design guidelines concerning powering my EP3C16Q240 FPGA? I can only use a 2 layer design, and I need 1.2 V to power the FPGA core and 2.5 V to power all the I/O buffer...
--- Quote Start --- but don't forget the return current on GND for powersupply nets and IOs as well --- Quote End --- What do u mean by that? Can u be more specific please?