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Steve-Mowbray-ENL's avatar
Steve-Mowbray-ENL
Icon for Occasional Contributor rankOccasional Contributor
1 year ago
Solved

FPGA passive serial configuration -- detect as PCIe device in Linux after configuration

Hi In passive serial configuration the Linux platform powers on and is booted with FPGA in unconfigured state -- our RBF file is then configured via passive serial and working but is not detected as...
Configuration
  • Wincent_Altera's avatar
    Wincent_Altera
    1 year ago

    Hi Steve,

    Thanks for your confirmation, I will transition this support thread to community.
    I saw corestar have reply some workaround, perhaps you may refer to that and see if that able to help you or not.

    Any time in future, if you having any problem, you may file a new thread.
    Someone will be there to support you. If you need my support on PCIe IP, please mention my name "Wincent" so that this will route to my support Q.

    If your support experience falls below a 9 out of 10, I kindly request the opportunity to rectify it before concluding our interaction. If the issue cannot be resolved, please inform me via this forum page of the cause so that I can learn from it and strive to enhance the quality of future service experiences.

    Regards,

    Wincent_Altera

    p/s: If any answer from the community or Altera Support is helpful, please feel free to give the best answer or rate 9/10 survey.

FvM's avatar
FvM
Icon for Super Contributor rankSuper Contributor
1 year ago

Hi,
in my view it's unwanted to get the FPGA reconfigured unconditionally during PC reboot. This should only happen on power-on reset or explicite request. I can confirm that evaluation boards like Terasic Arria TR10a-HL are keeping FPGA configuration during PC reboot.

This allows to check if the initial PCIe device enumeration works with your design.

You previously mentioned you are not sure if NCONFIG is triggered in your hardware during reboot, but it should be easy to find out, e.g. by loading a test configuration over JTAG.

Does the remove/configure/rescan sequence work for your with other configuarion methods, e.g. JTAG or AS?

Regards
Frank

  • Steve-Mowbray-ENL's avatar
    Steve-Mowbray-ENL
    Icon for Occasional Contributor rankOccasional Contributor
    1 year ago

    Hi Frank

    • "Does the remove/configure/rescan sequence work for your with other configuration methods, e.g. JTAG or AS?"
      • yes when we do an AS build and load the FPGA flash device with resulting JIC and also change the MSEL pins the FPGA PCIe device is enumerated and we can remove/rescan at will -- we can also change the MSEL pins while still running then do a passive serial write of our passive serial build RBF and remove/reset/rescan the PCIe devices into a working condition -- but what we want is power on in PS mode and do the FPGA configuration that way

    you mention the Terasic Arria TR10a-HL -- does that run with PC Linux and if so what is the sequence to rescan the PCI device when the FPGA is configured?

    Regards

    Steve