Forum Discussion
FPGA non-volatile key and tamper bit protection
- 3 years ago
Hi,
Apologies for the delay in response as I was checking this with our internal team.
The conclusion after discussed with engineering is when the tamper resistance bit is set, that means the device will accept only encrypted POF. Therefore, you can’t reprogram the key.
Since they key is lost and unable to reprogram the key, the device is unable to program.
Regards,
Aiman
Hi,
-What are the process that you can do and you cannot do now?
-Can you program JTAG, AS?
-Per my understanding, you cannot load the design into FPGA through due to you do not have the key? You can try to replace the flash and program again.
Regards,
Aiman
Hi,
- What are the process that you can do and you cannot do now?
What I can do : Flash FPGA configuration file in EPCQ
What I cannot do : Load a design into FPGA and program encryption key
- Can you program JTAG, AS?
I can program EPCQ with AS. I cannot program FPGA with JTAG because JTAG is in secure mode.
- Per my understanding, you cannot load the design into FPGA through due to you do not have the key? You can try to replace the flash and program again
Indeed I cannot load the design into FPGA but it has nothing to do with the flash.
My problem seems to be confusing so I will try to explain it again through a user case :
- I try to load an unencrypted design into FPGA but it doesn't work. Why ?
- Because I activated tamper bit protection (which is irreversible). What does tamper bit protection mean ?
- It means that only encrypted FPGA configuration files are accepted. No worry ! I just have to encrypt my design. I do it but FPGA configuration step fails. Why ?
- Because FPGA needs the encryption key to be able to decrypt the design. Let's try to program this key on FPGA. It fails. Why ?
- Because JTAG is in secure mode. What does JTAG secure mode means ?
- It means that I cannot program a device and I can only issue mandatory JTAG commands. Why is JTAG in secure mode ?
- Because I activated it when I enabled tamper bit protection. Is there a way to disable JTAG secure mode ?
- Yes ! There is one way : by issuing UNLOCK command. For 28nm devices (my device), you can only issue UNLOCK command through JTAG internal interface. How do I access JTAG internal interface ?
- By adding a specific module in my FPGA design. Let's do this and configure FPGA with this new design. Configuration fails. Why ?
- Back to step 1 : I cannot load a design into FPGA.
The question is : Considering this tamper bit activation, is there a way to configure FPGA ? Or a way to program a key ? Anything that could allow me to configure FPGA