Forum Discussion
Amir21
New Contributor
New ContributorFPGA MAX10 in "User-Mode" indication
Hi,
I'm using DPRs in MAX10-FPGA and init their memory through .hex files.
In order to verify when the FPGA initialization process done,
I'm trying to use the "INIT_DONE" output pin for inidica...
NurAiman_M_Intel
Super Contributor
Super ContributorHi,
Since INIT_DONE is not mention in the User guide, then there is not INIT_DONE can be check.
The other option is, you can check the status of the I/O pin as per your design. In user mode, the user I/O pins will then function as specified by your design.
Regards,
Aiman
Amir21New Contributor
New ContributorHi,
Sounds like a good idea, I will definitely try it.
In addition,
Any idea until when the FPGA reset should remain valid, when we use the DPR IP in my design?
Best Regards,
Aizik Amos.
Sounds like a good idea, I will definitely try it.
In addition,
Any idea until when the FPGA reset should remain valid, when we use the DPR IP in my design?
Best Regards,
Aizik Amos.
