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Amir21's avatar
Amir21
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4 years ago

FPGA MAX10 in "User-Mode" indication

Hi, I'm using DPRs in MAX10-FPGA and init their memory through .hex files. In order to verify when the FPGA initialization process done, I'm trying to use the "INIT_DONE" output pin for inidica...
NurAiman_M_Intel's avatar
NurAiman_M_Intel
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4 years ago

Hi,


Since INIT_DONE is not mention in the User guide, then there is not INIT_DONE can be check.


The other option is, you can check the status of the I/O pin as per your design. In user mode, the user I/O pins will then function as specified by your design.


Regards,

Aiman


Amir21's avatar
Amir21
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4 years ago
Hi,
Sounds like a good idea, I will definitely try it.

In addition,
Any idea until when the FPGA reset should remain valid, when we use the DPR IP in my design?

Best Regards,
Aizik Amos.