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Altera_Forum's avatar
Altera_Forum
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10 years ago

FPGA Image Compatibility

I use EP4CE15F17C8N on my board, but recently I can't get this chip in market, I can only find EP4CE15F17C7N and EP4CE15F17I7N.

Can I use the same image, which compiled for EP4CE15F17C8N, for the other chips? Is there any timing issue?

Thanks

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Hi,

    The difference between C8N, with C7N and I7N devices are from the speed grade. You can know the timing spec across different speed grade devices from its device datasheet.
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Hi,

    You can try to use Quartus II programmer to program your device. If the programmer allows, then there should be no issue to use the image. Note that C8 devce is of lower core speed grade as compare to C7 device. Since you are using C8 image on faster device, I think there should be no significant issue as well.

    By the way, if possible, it would be great if you can recompile your design in C7 to ensure everything is clean
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Thanks for prompt reply.

    For easier production management, I try to avoid two different images. Since C7 is faster than C8, I believe setup time should be better, but I am a little bit worry about the hold time... If somebody has used in this way, I would have more confidence.
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Yes, you are right. With a faster device, hold time is something to take into consideration. So far I have not use one image on two different speed grades to avoid any timing violation issue in the boards.

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Hi Wishbone:

    Yes you are absolutely right that Hold could be an issue especially at the fast corner. I have used C8 bitfiles on C7 devices in the past, but only in development and not production. (I experienced no issues)

    I looked in timing quest to see if there was a way to just re-run timing with the different speed grade, but unfortunately that didn't seem to be the case.

    Knowing the industry, my expectation is that the fast corner of all the devices of the same device/package combination would be the same, but the slow corner would be relaxed for the slower speed grades. (Since they are the same physical die).

    However without examining the timing files directly, I can't guarantee this statement.

    Pete